Having the process corner and operating temperature information can provide coarse calibration tuning for process corner and temperature sensitive circuits like delay lines. This will allow tighten design variation with the necessary compensation and enhance circuit and system performance.
The ‘process corner’ means the type of performance of the circuitry on the integrated circuit. Typically there are five process corners, Typical NMOS Typical PMOS (TT), Fast NMOS Fast PMOS (FF), Slow NMOS Slow PMOS (SS), Fast NMOS Slow PMOS (FNSP) and Slow NMOS Fast PMOS (SNFP). The fabrication process may vary during manufacture of an integrated circuit on a wafer, and the resulting circuit is classified according to its performance parameters, typically speed.
Generally, a semiconductor manufacturing facility, a foundry, will label the resulting circuit by its process corner. Chip designers who sent the design to the foundry find it useful to verify the actual process corner of the chips. Chips operating at higher speeds, such as FF, may allow for premium pricing. Additionally, the verification serves to verify the simulation and extraction models used at the foundry for the initial determination. For example, if a foundry marks several lots FF and they are actually FNSP, the models being used need to be changed. Another element of the verification is determination of the operating temperature of the integrated circuit.
Generally, designers want to limit power consumption and the presence of extraneous circuits and circuit elements on the chip. While being able to verify process corner and operating temperature provides advantages to the designers and sellers, the circuitry used should not consume much power or space on the chip.